What are the responsibilities and job description for the FPGA Design Engineer: Warren, New Jersey( Onsite from day 1 ) position at Nexwave?
Job Details
Title: FPGA Design Engineer
Location: Warren, New Jersey( Onsite from day 1 )
Job Description:
You will innovate in 4G, 5G, and O-RAN systems in a competitive atmosphere.
Experience in FPGA design and development.
Proficiency in Verilog/SystemVerilog for digital logic design.
Experience with FPGA development tools such as Xilinx Vivado, and Intel Quartus.
Knowledge of wireless communication systems, 4G/5G networks, and O-RAN architectures.
Strong understanding of DSP algorithms and their FPGA implementations.
Experience in debugging in the lab using Vivado ILAs and experience using signal generators and analyzers.
Familiarity with high-speed communication protocols (PCIe, Ethernet, JESD204B, CPRI, etc.).
Experience with C/C and Python for hardware modeling and testing.
Strong problem-solving and analytical skills with a proactive approach to debugging complex systems.
Job Responsibilities
Craft FPGA solutions for wireless communication applications like 4G, 5G, and O-RAN systems.
Design and implement FPGA-based digital signal processing (DSP) and communication systems.
Develop RTL designs in Verilog/SystemVerilog, ensuring efficient and high-performance implementations.
Integrate and optimize FPGA-based modules for wireless technologies, including 4G, 5G, and O-RAN architectures.
Perform FPGA synthesis, timing analysis, and resource utilization optimization.
Collaborate with verification engineers to define test benches and validate designs.
Debug and troubleshoot FPGA-based systems using simulation tools and hardware debugging techniques.
Work with C/C and Python for algorithm modeling and hardware/software co-design.
Implement high-speed interfaces such as PCIe, Ethernet, and JESD204B.
Document design specifications, test results, and technical reports.
Preferred Skills:
Experience with FPGA-based acceleration for AI/ML applications.
Understanding of MATLAB/Simulink for DSP algorithm verification.
Knowledge of power optimization techniques for FPGA designs.
Experience with Linux device drivers and embedded systems.