What are the responsibilities and job description for the Role : Electrical Design Engineer,, - Palo Alto, CA - Long Term position at Oorwin Labs?
Role : Electrical Design Engineer,
Location : Palo Alto, CA
Long Term,
We are looking for a JTAG & Signal Integrity Engineer with expertise in debugging, RTL development, and working with emulation platforms like Palladium. The ideal candidate should have a strong background in hardware validation, waveforms debugging, and signal integrity analysis.
Key Responsibilities :
- JTAG Protocol Analysis : Troubleshoot and debug JTAG-related issues, particularly in scenarios where the CPU does not halt as expected.
- Signal Integrity Testing : Perform signal integrity analysis to ensure high-speed signals function as expected without integrity loss.
- Waveform Debugging : Analyze and debug waveforms to identify issues in hardware design and functionality.
- RTL Development : Write and optimize RTL code for hardware design and validation.
- Palladium Emulation : Develop and implement wrappers for Palladium emulation platforms to enhance testing and verification.
- Collaboration & Documentation : Work closely with cross-functional teams, document debugging strategies, and contribute to improving hardware validation processes.
Required Skills & Experience :
Preferred Qualifications :
Nayak,
Talent Acquisition Team Lead
1740 Grassland Parkway, Ste 405, Alpharetta GA 30004
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Email : nayak@intuites.com
Email : nayak@joshpros.com
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