What are the responsibilities and job description for the Software Engineer, Infrastructure Performance position at OpenReq?
About Etched
Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.
Software Engineer, Infrastructure Performance
Designing and writing software for new ASICs is hard, and requires a huge amount of software and tooling. It is even more challenging for model-specific ASICs, as it is important for them to hit the market at the right time, and thus moving fast is essential.
You will make sure our CI tests run quickly, and if not, will decide what hardware to purchase / what tooling to use to speed them up. You will help us scope out and build internal tools to ship this chip, as well as subsequent chips, as fast as possible. You will also help us set up and provision new servers and hardware, working with an IT team if necessary.
The scope and title of this role can be modified for exceptional candidates.
Representative projects :
- Spec out a server using a 6 GHz desktop CPU to speed up single-threaded workloads
- Decide if moving our servers to the cloud / a colo facility makes sense to improve uptime
- Work with IT to connect our hypervisor to our CI
- Set up networking infrastructure to allow Jupyter notebook users to connect to our servers, without waiting for them to be restarted.
- Automate the process of setting up accounts for new hires.
You may be a good fit if you :
We encourage you to apply even if you do not believe you meet every single qualification.
Strong candidates may also have experience with :
How we're different :
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
Benefits :
Salary : $2,000
