Demo

Senior Electrical Engineer - Advanced Semiconductor Packaging and Integration

OSI Engineering, Inc.
Santa Clara, CA Full Time
POSTED ON 2/25/2025
AVAILABLE BEFORE 4/22/2025

Job Details

Company Overview:

Join our team and be at the forefront of semiconductor technology innovation. We are looking for a highly skilled Senior Electrical Engineer to contribute to our cutting-edge projects in Advanced Semiconductor Packaging and AI. You will collaborate with some of the brightest minds in the industry and have the opportunity to make a significant impact on the future of AI.

Key Responsibilities:

  • Lead the design and development of advanced semiconductor electronics and ASICs, ensuring high performance and reliability.
  • Develop and optimize mixed-signal designs, balancing both analog and digital circuit requirements.
  • Oversee semiconductor processing and advanced packaging technologies to enhance device performance and manufacturability.
  • Integrate High Bandwidth Memory (HBM) and Low Power Double Data Rate (LPDDR) memory into system designs to improve speed and efficiency.
  • Implement chiplet integration techniques, focusing on high-speed chiplet I/O and interconnects.
  • Ensure signal integrity and power integrity throughout the design and development process.
  • Automate chip layout generation and format conversion to streamline workflows.
  • Design printed circuit boards (PCBs) with a focus on performance, reliability, and manufacturability.
  • Conduct thermal simulations to optimize thermal management and ensure device reliability under various conditions.
  • Collaborate with cross-functional teams to ensure seamless integration and timely project delivery.
  • Mentor junior engineers and foster a culture of continuous learning and innovation.

Requirements:

  • M.S. in Electrical Engineering, Computer Engineering, or a related field.
  • Extensive experience in advanced semiconductor electronics and ASIC design.
  • Proficiency in mixed-signal design and semiconductor processing techniques.
  • Strong knowledge of advanced packaging technologies, including HBM and LPDDR integration.
  • Experience with chiplet integration, high-speed chiplet I/O, and interconnects.
  • Expertise in signal integrity, power integrity, and automated chip layout generation.
  • Proven track record in PCB design and thermal simulations.
  • Published works or patents in semiconductor technologies are highly desirable.
  • Excellent leadership, communication, and project management skills.
  • Ability to work collaboratively in a fast-paced, dynamic environment.

Preferred Qualifications:

  • Ph.D. in a relevant field.
  • Experience with industry-standard design and simulation tools.
  • Published works or patents in semiconductor technologies.
  • Strong leadership, communication, and project management skills.

Location: 100% onsite (Santa Clara, CA)

Duration: 3-6 months (possibility of extension)

Pay: $75/hr - $100/hr

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Salary : $75 - $100

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