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Post Silicon Validation Engineer

PDDN INC.
San Jose, CA Full Time
POSTED ON 3/20/2025
AVAILABLE BEFORE 5/20/2025

Job Description

Role: Post Silicon Validation Engineer

Location: San Jose, CA (Hybrid option available)

Job Type: Contract

Interview: Phone/Skype

We are seeking a Post Silicon Validation Engineer with a strong background in SOC/VLSI/Mixed Signal IC bring-up, hardware debugging, and proficiency in Verilog/VHDL, C/C , Python, and #silicon validation tools. Responsibilities include test plan development, hardware crafting, production test program release, and collaborating with design teams on innovative IP solutions.

 

#PostSiliconValidation #VLSI #Verilog #C #Python #SOCValidation #C2CHiring

Additional Information

All your information will be kept confidential according to EEO guidelines.

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