What are the responsibilities and job description for the Director of ASIC position at Positron AI?
About Positron AI
Positron.ai specializes in developing custom hardware systems to accelerate AI inference. These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt. Positron exists to create the world's best AI inference systems.
Position Overview:
We are looking for a Director of ASIC Engineering to drive the design, development, verification and execution of high-performance AI inference chips. This role will require technical expertise in ASIC architecture, low-power design methodologies, and a deep understanding of AI/ML workloads. The ideal candidate will have a proven track record of leading ASIC teams from concept to production in a startup or fast-paced environment.
Key Responsibilities:
- Lead the ASIC development team in the design, verification, and implementation of AI inference hardware.
- Define and specify ASIC architecture, microarchitecture, and roadmap in alignment with company goals and AI workload requirements.
- Oversee RTL design, physical design, verification, and validation processes.
- Optimize power, performance, and area (PPA) trade-offs to meet stringent AI inference requirements.
- Collaborate closely with software and prototyping teams to ensure hardware/software co-design optimizations.
- Manage relationships with foundries, IP vendors, and EDA tool providers.
- Drive Customer Owned Tooling (COT) tape-out and bring-up activities, ensuring successful first silicon validation and production ramp-up.
- Recruit, mentor, and develop a high-performing ASIC team.
Required Qualifications:
- Education: Degree in Electrical Engineering, Computer Engineering, or related field.
- Experience: 12 years of experience in ASIC development, with at least 5 years in a leadership role.
- Proven track record in delivering multiple ASIC/COT projects from concept to mass production.
- Deep understanding of digital design, verification, physical design, and manufacturing processes.
- Experience with leading AI accelerators, high-performance computing (HPC), or data center chip designs.
- Strong knowledge of RTL design (Verilog/SystemVerilog), synthesis, and timing closure.
- Expertise in low-power design techniques, and experience optimizing power for very high performance chips.
- Expertise in memory subsystem optimizations.
- Familiarity with EDA tools such as Cadence, Synopsys, and Mentor Graphics.
- Excellent leadership, communication, and cross-functional collaboration skills.
Preferred Qualifications:
- Experience in AI/ML accelerator design or custom AI silicon.
- Has defined and deployed a full EDA methodology based on Cadence or Synopsys tool suites.
- Successful tape out of 7nm, 5nm, and/or 3nm COT designs.
- Understanding of chiplet-based architectures and heterogeneous computing.
- Experience integrating external memory and IP modules.
- Knowledge of RISC-V or custom processor development.
- Successful technology development within a dynamic start-up environment.
Why Join Us?
- Be at the forefront of AI inference hardware innovation.
- Work with a world-class team of engineers and AI researchers.
- Opportunity to shape the future of AI acceleration technology.
- Competitive compensation, equity, and benefits package.
If you are a visionary ASIC leader passionate about building the next generation of AI hardware, we would love to hear from you! Apply today.
