What are the responsibilities and job description for the Silicon Verification Engineer 5 position at Protingent?
Job Description
Position Title: Silicon Verification Engineer 5
Position Description: Protingent has an exciting contract opportunity for a Silicon Verification Engineer 5 with our client located in Silicon Valley, CA. This is a Hybrid role with 50% onsite.
Job Description:
About Protingent: Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, Telecom, and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding, and exciting work opportunities for our candidates.
Position Title: Silicon Verification Engineer 5
Position Description: Protingent has an exciting contract opportunity for a Silicon Verification Engineer 5 with our client located in Silicon Valley, CA. This is a Hybrid role with 50% onsite.
Job Description:
- What makes this role interesting? - This role provides the opportunity to: This type of verification can span simulation and emulation, is not done by the same team in most silicon companies. Even in our company it is not in every team. Only a few teams do test of this kind, multiple platforms-based testing, it's very unique.
- Unique Selling Points: We are all very friendly, helpful, more like a family. I have been here for 24 years.
- Purpose of the Team: The team are group of verification engineers. They test out designs before it becomes silicon. They are looking for someone to do pre-silicon verification work.
- Key projects: This role will contribute to: N/A – no product information
- Typical task breakdown and operating rhythm: The role will consist of:
- 10% meetings
- 70% heads down- Writing Silicon verification tests, running and debugging tests, etc.
- 10% miscellas
- 10 years’ experience with UVM/System Verilog
- 10 years’ experience with scripting language
- 10 years’ experience with write and debug tests in UVM
- 10 overall years of experience in the field.
- Bachelor’s in computer science, Electrical/Electronics 7 years verification experience using UVM/System Verilog Methodology OR
- master’s in computer science, Electrical/Electronics 5 years verification experience using UVM/System Verilog Methodology is required to be eligible for this role.
- The ideal resume would contain UVM and System Verilog based verification experience.
- Job Type: Contract
- Location: Silicon Valley, CA. (Hybrid role with 50% onsite).
- Pay Range: $85/hr. to $115/hr.
- An offer of employment is contingent on successfully passing a background check, and applicants who do not successfully pass a background check will not be considered for employment.
About Protingent: Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, Telecom, and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding, and exciting work opportunities for our candidates.
Salary : $85 - $115