Demo

DFT Engineer

Quest Global
Santa Clara, CA Full Time
POSTED ON 4/1/2025
AVAILABLE BEFORE 4/30/2025

Responsibilities

  • This role typically involves leading the design and implementation of DFT features for ASICs, ensuring product test quality from design to production.
  • Participate/contribute in silicon bring-up, characterization, and silicon test
  • Responsibilities include silicon testing, scan flow development, and verification of test patterns, while driving improvements in testability and debugging of network switching ASICs.


Requirements:

  • 8 Year of experience working on ATPG and DFT tools.
  • Proficiency in industry-standard tools such as Mentor Tessent, Synopsys DFT Compiler, and Cadence DFT tools is essential.
  • A strong understanding of testability techniques like scan insertion, built-in self-test (BIST), and boundary scan (JTAG) is required.
  • Additionally, experience with scripting languages such as Perl, Tcl, or Python is beneficial.


Education: Bachelor's degree in electrical or computer engineering or related field

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