What are the responsibilities and job description for the Hardware Design Engineer position at Randstad Engineering US ?
Description :
Typical Day in the Role
o Team got expanded, so the role of sponsor is managing particular Ips that go into a chip.
Key projects : o Next generation of the MEIA chip
o Need someone to look into the design and understand what is happening / be able to assist
Typical task breakdown and operating rhythm : 10-20% meetings 70-80% heads down / focus work Compelling Story & Candidate Value Proposition
What makes this role interesting? - This role provides the opportunity to Working on one of the most critical AI chips Unique Selling Points : Very challenging work where they can learn a ton and how each IP interacts Candidate Requirements
Years of Experience Required : 5-7 overall years of experience in the field. Degrees or certifications required : Bachelor's degree in a related technical field required; a Master's degree is preferred. Disqualifiers : N / A Best vs. Average : Have design and de-bugging experience in system blocks Performance Indicators : Performance will be assessed based on Quality of work and meeting deadlines They will be working alongside the lead designer to get these projects done Top 3 Hard Skills Required Years of Experience
1. Complex RTL work experience – 7 YOE 2. Design Verification (de-bugging) – 7 YOE 3. RTL fundamentals (quality checks such as cdc and lint) – 7 YOE Hard Skills Assessments
Expected Dates that Hard Skills Assessments will be scheduled : ASAP Hard Skills Assessment Process : The assessment process will include 25-minute HSA with sponsor. Required Candidate Preparation : Candidates should have their resume prepared prior to the assessment. Job Responsibilities :
Create design specifications and test plans in collaboration with other teams. Implement and verify RTL (Register Transfer Level) designs for image and video processing blocks Support verification engineers to ensure bug-free silicon Perform front end synthesis and analysis timing results . Run CDC and Lint for the design blocks. Analyze and provide direction in terms of performance, gate count, and power for various digital designs Collaborate with cross-functional teams to integrate Ips. Skills and Qualifications :
Expertise in system Verilog and RTL design1. Experience in designing Ips similar to image and video processing blocks. Strong understanding of floating-point arithmetic implementation in RTL. Substantial background in debugging designs as well as simulation environment. Familiarity with design for test (DFT) and scan concepts. Experience in scripting language such as Python or Perl. Proficiency in simulation , cdc and lint checking tools. Bachelor's degree in a related technical field required; a Master's degree is preferred1. 5-7 years of relevant experience in digital design and image / video processing.
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