What are the responsibilities and job description for the Post Silicon Validation Engineer Ethernet position at Rays Techsolutions Inc.?
Job Details
Job Title: Post Silicon Validation Engineer Ethernet
Location: Santa Clara, CA (Hybrid)
Client: Palo Alto Networks
Required Skills:
5 years of relevant post-silicon validation experience.
Proficiency with lab equipment, logic analyzers, and oscilloscopes.
Expertise in Python and C.
Thorough understanding of Ethernet PHY / PCS / MAC standards (e.g. IEEE 802.3) and technologies.
Proven success in functional and electrical bringup and validation of PAM4 and NRZ Ethernet interfaces on multiple ASICs.
Hands-on experience with traffic generators such as Spirent and Ixia
Demonstrated ownership and independence in planning, analyzing, debugging, driving vendors, and reporting status.
Strong collaboration and communication skills.
Required Skills:
OSCILLOSCOPES
ETHERNET
VALIDATION ENGINEER
PYTHON
LOGIC ANALYZERS
Additional Skills:
PCS
ASIC
APPLICATION-SPECIFIC INTEGRATED CIRCUIT GENERATORS ASICS IEEE DEBUG MAC
Must understand Networking protocols for the lab environment.
Familiar with Google Suite,Looker Studio, Spreadsheets and Word documents.
Complete tasks with limited supervision
Basic Technical skills ( PCBA debug, Linux, Debug, Networking)
Self Motivated
Attention to detail
Communication skills
2-5yrs of experience working in a similar role
Associates/Technical degree or equivalent experience
