What are the responsibilities and job description for the Field-Programmable Gate Arrays Engineer position at Russell Tobin?
Job Title: FPGA Engineer III
Location: Mesa, AZ 100% Onsite
Duration: 4 Months plus
Pay Range: $50/hr-$60/hr on W2 (DOE)
As an FPGA Engineer, you will have the following responsibilities:
- Architect, design, implement, and validate FPGA RTL to enable prototype systems that drive display subsystem.
- Collaborate with cross-functional teams to define RTL specs and plan feature development roadmaps.
- Work closely with software team to write low-level drivers that interface with RTL.
- Drive major aspects of hardware bringup, characterization, and debug in collaboration with other EEs. Guide and mentor junior engineers to encourage technical growth and maintain the client’s high standards
Requirements:
- Hands-on bringup and debug of PCBs that have standard digital interfaces (e.g. SPI, I2C, LVDS, DDR). Using standard lab equipment (e.g. multimeters, oscilloscopes, spectrum analyzers) along with FPGA tools such as Chipscope / SignalTap etc.
- Able to read board schematics and know EE fundamentals.
- Firmware development using C/C programming language.
- Version control systems such as Git, Perforce.
Additional Responsibilities:
- Promote innovation and new technology to further enhance the client's display performance and user experience.
- Create and give presentations before and after prototyping new ideas.
- Communicate and demonstrate prototypes to Cross-Functional Teams.
- Demonstrate creativity in problem solving and adapt quickly to new technical areas.
Benefits Info
Russel Tobin offers eligible employee’s comprehensive healthcare coverage (medical, dental, and vision plans), supplemental coverage (accident insurance, critical illness insurance and hospital indemnity), 401(k)-retirement savings, life & disability insurance, an employee assistance program, legal support, auto, home insurance, pet insurance and employee discounts with preferred vendors.
Salary : $60
