What are the responsibilities and job description for the Lead Design Verification (DV) Engineer position at SBT?
SBT is the exclusive executive recruiting firm for this confidential position.
This confidential company is strategically bringing on a hands-on technical DV lead. In this role, the verification expert will be collaborating cross-functionally with a talented team of systems HW engineers and SW architects in developing cutting-edge computing systems. This individual will have first-hand involvement in the full lifecycle of complex chip development, solving complex challenges directly affecting tier-one customers.
Technical Responsibilities
Verification Planning and Strategy
- Develop verification plans and strategies based on design specifications and requirements to ensure thorough testing and validation of semiconductor designs
- Create verification methodologies, test benches, and test cases to effectively verify and validate digital designs, including RTL (Register Transfer Level) designs
Building DV infrastructure
Qualifications
Relevant company backgrounds include : AMD, Marvell, Cisco, Broadcom, Intel, Qualcomm, and other networking companies
