Demo

Physical Design Engineer

Sintegra Inc.
Austin, TX Full Time
POSTED ON 1/8/2025
AVAILABLE BEFORE 2/5/2025
  • Block level design from RTL-to-GDSII: synthesis, floor-planning, place & route, timing/EMIR/PV closure, and signoff
  • Proficient with Cadence Implementation tool suite (Genus, Innovus)
  • Controllers for High Speed IO IP's
  • Structural implementation: datapaths, bus planning and routing
  • Experience with multi-power domain design
  • Solid scripting skills in tcl and python

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