What are the responsibilities and job description for the Technology Development Principal Engineer position at SkyWater Technology Foundry, Inc.?
This SkyWater Technology Development Principal Engineer will design, develop, and support superconducting offerings in a technologist-level role.
Responsibilities:
New device development, transfer, and integration in a manufacturing environment.
Liaison with Design Enablement, process integration, and reliability groups on matters relating device construction, manufacturing design rules, and PDK development for superconducting technologies.
Lead cross-functional teams to deliver device design, test chip layout, and product characterization.
Provide process and device simulations to support new technology development.
Serve as a subject matter expert to customers and SkyWater colleagues for technology elements, test setup, design rule constraints, and device performance targeting.
Minimum Qualifications:
MS/PhD in Electrical Engineering, Materials Science, Physics, or related field with Master's and 8 years experience, or PhD with 3 years experience.
At least 5 years of experience in related advanced device development.
Comprehensive knowledge of superconducting device and interconnect performance, optimization, and yield limiters relevant to interposer process flows.
Expertise in cryogenic device characterization to meet process control and modeling requirements.
Familiarity with device, process, interconnect, and IC modeling such as TCAD, COMSOL, field solvers for RC extraction, Spectre, Verilog, Cadence Virtuoso ADE, or comparable software.
Experience in dealing with both internal and external customers. Able to articulate thought processes in both technical and business settings.
Knowledge of DOE, SPC, and 6-sigma concepts and applications.
US Citizenship Required: This position will require the holding of or ability to obtain government security clearance which requires U.S Citizenship.
Preferred Qualifications:
At least 10 years of advanced device development experience.
Process development, modeling, yield, or reliability background for fields such as: CMOS, MEMS, photonics, or superconducting.
Background in device characterization and modeling including parasitic coupling, noise, ESD, and stress effects.
Experience in DOE and CMOS device design for extreme environments such as cryogenic, radiation, or high temperature.
Understanding of typical mixed-signal IC design.
Experience in project technology transfers into or out of a semiconductor foundry.
