What are the responsibilities and job description for the R&D Design Engineer, Sr Staff – DDR PHY Low Power Architect position at Synopsys Inc?
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a seasoned professional with a passion for cutting-edge technology and innovation. With at least 8 years of experience in the field, you have a deep understanding of high-speed interface principles, including mixed-signal design and off-chip signaling. You excel in generating and supporting documentation through detailed written specifications and have a track record of effectively communicating these within design teams and to external customers. Your expertise in RTL logic design, simulation, test planning, and verification of complex integrated circuit components is unparalleled. You are knowledgeable in design-for-test, timing analysis, power analysis, behavioral modeling, and synthesis constraints. You have a proven ability to work across multi-site teams, troubleshoot, and debug mixed-signal interfaces, and you are well-versed in low power design and methodology. Your strong analytical skills and attention to detail enable you to predict power for new products, deliver power reports to customers, and optimize designs for low power.
What You’ll Be Doing:
You are a collaborative and innovative thinker who thrives in a dynamic and fast-paced environment. Your strong communication skills enable you to effectively convey complex technical concepts to both internal teams and external customers. You are detail-oriented, with a strong analytical mindset and a passion for problem-solving. Your ability to work well in multi-site teams and your proactive approach to troubleshooting and debugging make you a valuable asset to any project. You are committed to continuous learning and staying updated with the latest industry trends and technologies.
The Team You’ll Be A Part Of:
You will join a collaborative, multi-person engineering team engaged in the planning and execution of the design for next-generation DDR PHYs. This team is dedicated to driving technological innovation and delivering high-performance, low-power solutions to meet the evolving needs of our customers. Together, you will work on related DDR PHY development projects, leveraging your collective expertise to create leading-edge products that set new industry standards.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. The salary range for this position is $130,000 to $190,000 annually. Your recruiter will provide more details about the salary range and benefits during the hiring process
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a seasoned professional with a passion for cutting-edge technology and innovation. With at least 8 years of experience in the field, you have a deep understanding of high-speed interface principles, including mixed-signal design and off-chip signaling. You excel in generating and supporting documentation through detailed written specifications and have a track record of effectively communicating these within design teams and to external customers. Your expertise in RTL logic design, simulation, test planning, and verification of complex integrated circuit components is unparalleled. You are knowledgeable in design-for-test, timing analysis, power analysis, behavioral modeling, and synthesis constraints. You have a proven ability to work across multi-site teams, troubleshoot, and debug mixed-signal interfaces, and you are well-versed in low power design and methodology. Your strong analytical skills and attention to detail enable you to predict power for new products, deliver power reports to customers, and optimize designs for low power.
What You’ll Be Doing:
- Understanding marketing and customer desires for Synopsys’ DDR PHY interface performance and functionality.
- Translating those desires into a set of product design features and functions.
- Generating the functional description for the product, creating specifications describing the interface components, operation, structure, and behavioral parameters.
- Optimizing the design for performance, power, and area.
- Interacting and communicating with design teams performing logical design, logical verification, analog circuit design and verification, and layout design.
- Supporting customers in their implementation of the product.
- Helping to predict power for new products, delivering power reports to customers, and optimizing the design for low power.
- Contributing to the design and development of next-generation DDR PHYs in the Synopsys IP portfolio.
- Driving improvements in power efficiency for various use cases through innovative RTL and circuit design.
- Enabling Synopsys to stay ahead of industry trends by participating in standards bodies and evaluating new ideas.
- Ensuring high-quality product specifications that meet customer needs and industry standards.
- Enhancing customer satisfaction by providing expert support during product implementation.
- Collaborating with a multi-person engineering team to achieve groundbreaking technological advancements.
- Deep understanding of high-speed interface principles, including mixed-signal design and off-chip signaling.
- Strong skills in generating and supporting documentation through detailed written specifications.
- Expertise in RTL logic design, simulation, test planning, and verification of complex integrated circuit components.
- Knowledge in design-for-test, timing analysis, power analysis, behavioral modeling, and synthesis constraints.
- Proficiency in low power design and methodology.
- Minimum of 8 years of related experience.
You are a collaborative and innovative thinker who thrives in a dynamic and fast-paced environment. Your strong communication skills enable you to effectively convey complex technical concepts to both internal teams and external customers. You are detail-oriented, with a strong analytical mindset and a passion for problem-solving. Your ability to work well in multi-site teams and your proactive approach to troubleshooting and debugging make you a valuable asset to any project. You are committed to continuous learning and staying updated with the latest industry trends and technologies.
The Team You’ll Be A Part Of:
You will join a collaborative, multi-person engineering team engaged in the planning and execution of the design for next-generation DDR PHYs. This team is dedicated to driving technological innovation and delivering high-performance, low-power solutions to meet the evolving needs of our customers. Together, you will work on related DDR PHY development projects, leveraging your collective expertise to create leading-edge products that set new industry standards.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. The salary range for this position is $130,000 to $190,000 annually. Your recruiter will provide more details about the salary range and benefits during the hiring process
Salary : $130,000 - $190,000
