Demo

Senior Layout Design Engineer

Synopsys, Inc.
Sunnyvale, CA Full Time
POSTED ON 1/15/2025
AVAILABLE BEFORE 3/28/2025

We Are :

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are :

You are an experienced and highly motivated professional with a strong technical background in analog and mixed-signal (A&MS) layout design. You thrive in collaborative environments, working closely with cross-functional teams to deliver high-quality layout designs. Your expertise in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler, allows you to create and optimize complex layouts efficiently. You are well-versed in physical verification processes and design rule checks, ensuring the integrity and manufacturability of your designs. Your problem-solving skills and systematic approach enable you to tackle challenges effectively. You are a lifelong learner, staying updated with the latest industry trends and advancements in A&MS layout design. Your excellent communication and interpersonal skills make you a valuable team player, contributing to the success of your projects and the organization as a whole.

What You’ll Be Doing :

  • Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits.
  • Create and optimize layout designs using industry-standard EDA tools.
  • Perform physical verification and design rule checks to ensure design integrity and manufacturability.
  • Participate in design reviews and provide feedback to improve design quality.
  • Work closely with circuit designers to understand design specifications and constraints.
  • Contribute to the development and enhancement of layout design methodologies and best practices.
  • Stay updated with the latest industry trends and advancements in A&MS layout design.

The Impact You Will Have :

  • Ensure the delivery of high-quality layout designs for PVT Sensor IP development, integral to SOC subsystems.
  • Enhance the manufacturability and reliability of our silicon lifecycle monitoring solutions.
  • Drive innovation in layout design methodologies and best practices.
  • Collaborate effectively with circuit designers to meet design specifications and constraints.
  • Contribute to the overall success of the rapidly expanding PVT IP group.
  • Support Synopsys' leadership in the market for process, voltage, temperature, current, and droop sensors.
  • What You’ll Need :

  • Bachelor’s or master’s degree in electrical engineering or a related field.
  • 3 years of experience in A&MS layout design for integrated circuits.
  • Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler.
  • Exceptional knowledge of layout design methods, techniques, and methodologies.
  • Experience with physical verification tools, such as Calibre or Assura.
  • Understanding of semiconductor process technologies and their impact on layout design.
  • Excellent problem-solving and systematic skills.
  • Ability to work effectively in a team-oriented environment.
  • Good communication and interpersonal skills.
  • Who You Are :

    You are a dedicated and detail-oriented professional with a passion for A&MS layout design. Your ability to work collaboratively with cross-functional teams and your strong technical skills make you an asset to any project. You are proactive in staying updated with the latest industry trends and continuously seek to improve your knowledge and skills. Your excellent communication and interpersonal skills enable you to contribute effectively to team discussions and design reviews.

    The Team You’ll Be A Part Of :

    You will be part of the rapidly expanding PVT IP group at Synopsys, a team dedicated to developing cutting-edge PVT Sensor IPs for SOC subsystems. This team is at the forefront of innovation, working on custom layout designs for Process, Voltage, Temperature, Current, and Droop sensors. You will collaborate with talented professionals who share your passion for excellence and innovation in layout design.

    Rewards and Benefits :

    We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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