What are the responsibilities and job description for the Senior Staff ASIC Design Engineer position at Synopsys Inc?
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
As a Verification Design Engineer, you are passionate about ensuring the highest quality in analog and mixed-signal designs. You possess a keen eye for detail and are driven by a desire to solve complex problems. Your background in testplan review and PHY verification strategy makes you an ideal candidate for this role. You thrive in collaborative environments and are eager to coach and enable teams to achieve their best. With your strong technical foundation in firmware and PHY quality, you are ready to make a significant impact at Synopsys.
What You’ll Be Doing:
Collaborating with cross-functional and cross-geo teams to define and implement best in class Die to Die IP design at PHY and controller levels.Develop and implement PHY verification strategies and comprehensive test plans.Review and refine test plans to ensure alignment with project goals and industry standards.Implement PHY and controller testbenches, monitors and scoreboards using UVM methodology Achieve code coverage goals and ensure thoroughly verified designs Work with the Lab/System team for test plan, silicon bring up and debugConduct Analog Mixed Signal Verification and Validation (VAL) for high-quality Die to Die IPCollaborate with firmware teams to integrate and test firmware components.Ensure the highest standards of Die to Die PHY quality through rigorous testing and validation processes.Coach and enable the global Verification and Validation (VN) team to achieve optimal performance.
The Impact You Will Have:
Enhancing the reliability and performance of Synopsys' analog and mixed-signal products.Driving innovation in verification strategies and methodologies.Ensuring the delivery of high-quality PHY components to our customers.Fostering a collaborative and high-performing verification team.Contributing to the overall success of Synopsys' product development cycles.Supporting the continuous improvement of our verification processes and tools.
What You’ll Need:
Significant Experience with coding in System Verilog or Verilog and UVM methodology Experience in verification of DDR/HBM memory or Die to Die interfaces is higly desirable Significant Experience with standard IP/SOC Verification flow/software tools Strong knowledge of scripting, Linux/Unix environment Experience in testplan review and analog mixed-signal verification.Expertise in ensuring PHY quality through rigorous testing.Ability to coach and enable verification teams.Experience in leading and driving technical solutions across organization The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams
Who You Are:
Detail-oriented with a strong analytical mindset.Collaborative and a team player.Excellent problem-solving skills.Strong communication skills.Passionate about continuous learning and improvement.
The Team You’ll Be A Part Of:
You will be joining a dynamic and dedicated team focused on analog and mixed-signal verification. Our team prides itself on fostering a collaborative environment where innovation and continuous improvement are encouraged. Together, we work towards ensuring the highest quality and performance of Synopsys' products.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
As a Verification Design Engineer, you are passionate about ensuring the highest quality in analog and mixed-signal designs. You possess a keen eye for detail and are driven by a desire to solve complex problems. Your background in testplan review and PHY verification strategy makes you an ideal candidate for this role. You thrive in collaborative environments and are eager to coach and enable teams to achieve their best. With your strong technical foundation in firmware and PHY quality, you are ready to make a significant impact at Synopsys.
What You’ll Be Doing:
Collaborating with cross-functional and cross-geo teams to define and implement best in class Die to Die IP design at PHY and controller levels.Develop and implement PHY verification strategies and comprehensive test plans.Review and refine test plans to ensure alignment with project goals and industry standards.Implement PHY and controller testbenches, monitors and scoreboards using UVM methodology Achieve code coverage goals and ensure thoroughly verified designs Work with the Lab/System team for test plan, silicon bring up and debugConduct Analog Mixed Signal Verification and Validation (VAL) for high-quality Die to Die IPCollaborate with firmware teams to integrate and test firmware components.Ensure the highest standards of Die to Die PHY quality through rigorous testing and validation processes.Coach and enable the global Verification and Validation (VN) team to achieve optimal performance.
The Impact You Will Have:
Enhancing the reliability and performance of Synopsys' analog and mixed-signal products.Driving innovation in verification strategies and methodologies.Ensuring the delivery of high-quality PHY components to our customers.Fostering a collaborative and high-performing verification team.Contributing to the overall success of Synopsys' product development cycles.Supporting the continuous improvement of our verification processes and tools.
What You’ll Need:
Significant Experience with coding in System Verilog or Verilog and UVM methodology Experience in verification of DDR/HBM memory or Die to Die interfaces is higly desirable Significant Experience with standard IP/SOC Verification flow/software tools Strong knowledge of scripting, Linux/Unix environment Experience in testplan review and analog mixed-signal verification.Expertise in ensuring PHY quality through rigorous testing.Ability to coach and enable verification teams.Experience in leading and driving technical solutions across organization The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams
Who You Are:
Detail-oriented with a strong analytical mindset.Collaborative and a team player.Excellent problem-solving skills.Strong communication skills.Passionate about continuous learning and improvement.
The Team You’ll Be A Part Of:
You will be joining a dynamic and dedicated team focused on analog and mixed-signal verification. Our team prides itself on fostering a collaborative environment where innovation and continuous improvement are encouraged. Together, we work towards ensuring the highest quality and performance of Synopsys' products.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
