What are the responsibilities and job description for the ASIC Verification Engineer for High-Speed AI Chip Development position at Tara Technical Solutions (TTS)?
Join Our High-Speed ASIC AI Chip Team : San Jose - In-Office Daily
Are you passionate about cutting-edge technology and looking to make an impact in the world of High-Speed ASICs? We invite you to be a vital part of our team where you will :
- Conduct in-depth analyses of chip architecture and micro-architecture to create and implement comprehensive test plans that thoroughly validate switch features during both emulation and post-silicon phases.
- Develop system-level tests utilizing Tcl, ITcl, Python, and C / C for the validation of networking switch chips and systems.
- Synthesize Verilog RTL and build innovative models for emulation platforms such as Zebu or Palladium.
- Utilize your debugging expertise to perform chip / system-level debugging and root cause analysis for addressing hardware and software issues encountered before and after silicon integration.
- Enhance project efficiency through the development and optimization of automation scripts and emulation methodologies.
- Create reusable design blocks, libraries, and verification components that streamline the emulation process.
- Plan, organize, and execute silicon bring-up procedures and testing strategies.
Preferred Qualifications :
We encourage you to apply and be a part of our dynamic and innovative team!
