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Tata Technologies | Senior Hardware Engineer

Tata Technologies
Palo Alto, CA Full Time
POSTED ON 1/24/2025
AVAILABLE BEFORE 4/21/2025

At Tata Technologies we make product development dreams a reality by designing, engineering, and validating the products of tomorrow for the world’s leading manufacturers. Due to our continued growth, we are now recruiting for a Senior Hardware Engineer to strengthen our team in Palo Alto, CA.

Senior Hardware Engineer

Palo Alto, CA

Job Description :

As a Sr. physical design engineer, you will contribute to all design phases of physical design of high performance SoC design at both the block and subchip levels, as well as the full-chip level from RTL to GDSII. You will collaborate with the Foundry Process Engineer, SoC Architect, Microarchitecture, Packaging, Signal Integrity and Power Integrity teams to drive the overall Physical Design aspects, leading to a successful tapeout and production silicon.

Key Qualifications include (but not limited to) :

  • Extensive physical design experiences at both the block level and subchip level, as well as full-chip level is a plus.
  • Deep knowledge in physical design, including physical aware synthesis, floorplanning, clock tree implementation, routing, STA timing signoff, and chip-finishing.
  • Good knowledge of basic soc architecture. Be able to work with Front-end design team to address timing, congestion and power issues.
  • In-Depth Knowledge of design flow from RTL to GDSII.
  • Good knowledge of EM-IR sign-off requirements.
  • Experience in using EDA tools like Synopsys ( / Cadence) for PPA optimization.
  • Good script skills such as perl / tcl.

Responsibilities include (but not limited to) :

  • Perform subchip level and block level place and route, and close design to meeting performance, power and area.
  • Lead and Perform all aspects of full chip SoC integration activities : die size optimization, floorplanning, hard IP integration, partitioning, chip level clock planning, bump placement / RDL routing, power grid generation, full chip STA timing, DFT strategy planning, and final physical verification.
  • Good knowledge of timing analysis, power analysis, physical verification (DRC / LVS), and formal verification
  • Working knowledge of UPF specification in Power Intent design, implementation, and verification of power gating, level shifter, and isolation.
  • Define EM-IR signoff requirements and sign-off methodology.
  • Define and support Static and Dynamic, thermal, electro-migration, peak current, di / dt, and effective resistance analysis
  • Develop and support Chip-package-Co-Analysis (CPA) and Chip-Power-Model (CPM) on-die model for package & die co-design analysis
  • Be an EM-IR sign-off lead with successful tape out track records
  • Excellent hand-on experience in voltage drop analysis using redhawk or redhawk-SC
  • Excellent hand-on experience and debugging skills of finding root cause of voltage drop and EM issues
  • Solid background in EM-IR fundamentals, analytical aptitude and excellent attention to detail
  • Other Qualifications :

  • At least 15-20 years of experience in the chip industry with a track record of delivering silicon into volume production across multiple technology generations
  • Proven track record of SoC definition of complex SoCs over multiple technology generations
  • BS / MS / PhD in Electrical and Computer Engineering with emphasis on Computer Architecture
  • Experienced in CPU Architecture – preferably Instruction Decode or Execution Units
  • Experience in Multi SoC systems is a plus
  • Knowledge of Machine Learning Algorithms (e.g., Convolutional Neural Networks) is a huge plus
  • Exhibits the right teamwork and leadership qualities backed up with references
  • If you are passionate about bringing innovation to the projects, you work on then we would love to hear from you. We offer a complete benefits package, including; medical, dental, vision, life insurance, short- and long-term disability, FMLA and 401K.

    Tata Technologies Inc. is an Equal Opportunity / Affirmative Action employer. We provide equal employment opportunities to all qualified employees and applicants for employment without regard to race, religion, sex, age, marital status, national origin, sexual orientation, citizenship status, veteran status, disability, or any other legally protected status. We prohibit discrimination in decisions concerning recruitment, hiring, compensation, benefits, training, termination, promotions, or any other condition of employment or career development.

    Tata Technologies : Engineering a better world.

    Tata Technologies would like to thank all applicants for their interest, each application will be reviewed against the set criteria for the role. We would like to advise that only candidates under consideration will be contacted. If you do not hear from us within 10 working days following the closing date it will mean that unfortunately your application has not been successful. We will however retain your details for any suitable future opportunities.

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