Demo

Hardware Engineer Intern

TetraMem - Accelerate The World
Fremont, CA Intern
POSTED ON 2/20/2025
AVAILABLE BEFORE 3/19/2025

Requirements:

  • MS or BS in Electrical Engineering, Electronics Engineering, or Physics
  • Knowledge of the IC development flow in advanced CMOS processes including design, layout, and tape-out.
  • Knowledge in analog/mixed-signal circuits such as Op-Amp, bandgap, regulator, data converter, etc.
  • Familiar with common EDA environments, and design/simulation/layout CAD tools (e.g., Synopsys, Cadence, Mentor Graphics etc.)
  • Experience with Verilog and system Verilog
  • Experience with VCS, Verdi or other industry standard tools
  • Experience with pre-layout simulation and post-layout simulation
  • Understanding of the design flow, able to work with the backend team
  • Familiarity with AMBA APB AXI Protocol
  • Familiarity with RISC/Arm or other core architectures
  • Ability to work in a startup environment, and to work both independently and as a team player as circumstances indicate.

Experience in one or more of the following areas considered a strong plus:

  • Hands-on experience and in-depth knowledge in CMOS low-power design and techniques
  • Hands-on experience with DAC and ADC design
  • Experience with memories, especially emerging non-volatile memory
  • Experience with RISC-V architecture
  • Working knowledge of SoC architectures including CPU, GPU or accelerators

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