What are the responsibilities and job description for the Senior ASIC Verification Engineer position at The Panther Group?
Overview :
Our client has a search open for a Senior ASIC Verification Engineer to join their team on a direct hire basis. This person will be following UVM methodology and working with design and engineering teams with a focus on RTL design, test plan development and test bench implementation, and debugging.
Key Responsibilities :
- Provide technical leadership by creating ASIC verification flow with UVM methodology
- Work with design engineers to create both module level and top-level comprehensive verification plan for analog and digital IP blocks, as well as SOC system level
- Responsible for creating testbench for RTL and gate level simulation with UVM verification methodology
- Facilitate coverage benchmark and define design sign-off criteria
- Collaborate with FW engineer to bring up SOC verification environment
- Assist in FPGA emulation and troubleshooting with simulation testbench
Ideal Profile :
