What are the responsibilities and job description for the R&D Engineer- SiPho position at Tower Semiconductor?
Client
Tower Semiconductor
Position
R&D Engineer - SiPho
Location
Newport Beach, California
Duration
Permanent
Openings
Salary
Flexible, $75,000-$170,000 depending on years of experience
Interview Process :
1st round : Microsoft Teams Interview
2nd round : Microsoft Teams Panel Interview
Role Overview :
Insight Global is hiring a R&D Engineer focused on Silicon Photonics for a leading Semiconductor company in Newport Beach, California. The R&D Engineer will be responsible for research, development, and improvement of existing and newly developed devices and process technologies for manufacture of Silicon Photonics-related devices in a Semiconductor wafer foundry. This individual will exercise independent judgement in developing methods, techniques, and evaluation criteria.
Day-To-Day :
Process technology development and implementation in a VLSI manufacturing, foundry environment.
Silicon photonic device design, characterization, and optimization.
Participate and coordinate experiments toward technology development and yield enhancement.
Work closely with process engineering team, test team, and customers to define goals and manufacturing solutions.
Design test structures in CAD and define tests for device characterization in ICCAP, Labview.
Provide support to resolve customer issues, problems, and questions.
Support transfer from development to production for processes variants.
Support process transfer to worldwide fabrication facilities when needed.
Basic Qualifications :
Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Physics, Mat Sci, Chemical Engineering or related fields.
5 years of experience in Silicon Photonics-related process and device development.
MUST BE AN EXPERT in Silicon Photonic and Optoelectronic devices.
Strong verbal and written communication skills. Strong problem solving and data analysis skills.
Technology requirements :
Optical simulation software (Lumerical)
Ability to read and edit mask layout data (Cadence Virtuoso)
Statistical data processing (R or JMP)
Device and process TCAD simulation tools (Medici, Sentaurus)
Semiconductor FAB lot management (PROMIS, Workstream)
Salary : $75,000 - $170,000
