What are the responsibilities and job description for the ASIC/RTL Design position at TPI Global Solutions?
Title : ASIC / RTL Design Engineer
Location : San Jose California - Onsite
Interviews : 2 Interviews (Online).
Rate : $78.57 / Hour
Top skills :
RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime).
Job Duties :
- The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IP's.
- Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.
- Our RTL Design Engineers are expected contribute in all aspects of SoC design including : Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.
Experience and Education :
Salary : $79
