What are the responsibilities and job description for the Physical Verification Engineer position at Triple Crown?
Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth.
CONTRACT Position: 6 Months (potential for extensions)
Location: San Jose, CA
We are looking for a highly skilled and detail-oriented Physical Verification Engineer to join a design team in the semiconductor industry. In this role, you will be responsible for ensuring that our IC designs meet the necessary physical verification standards, such as DRC (Design Rule Check), LVS (Layout vs. Schematic), and ERC (Electrical Rule Check), to ensure they are manufacturable and function correctly. You will work closely with layout designers, CAD engineers, and foundry teams to verify the integrity and compliance of IC designs before production.
Job Description:
- Perform Physical Verification tasks, including DRC, LVS, and ERC, to ensure the layout conforms to design rules and standards for manufacturability and functionality.
- Work with design teams to address any rule violations or layout issues detected during physical verification.
- Use industry-standard verification tools (e.g., Mentor Calibre, Cadence Assura, Synopsys IC Validator) to automate and execute physical verification checks.
- Collaborate with circuit designers to ensure that the design intent is accurately represented in the physical layout.
- Experience with 3nm, no alternative.
Skills:
- Physical Verification
- LVS
- DRC
- Calibre
- 3nm
Benefits:
- Paid weekly!
- Health, Dental and Vision Insurance
- 401k
