Demo

Sr. Physical Design Engineer

Tripod Networking
San Jose, CA Full Time
POSTED ON 1/17/2025
AVAILABLE BEFORE 4/15/2025

Will consider helping with relocation.

Qualifications :

  • 10 years of hands-on ASIC engineering experience, VLSI / SoC physical design workflows, with EDA tools : Cadence / Synopsys (Genus / DC), power analysis, STA analysis, clock methodology, and other aspects of physical design flows
  • Strong physical design knowledge for STA analysis and ability to write SDCs as needed.
  • Experience leading and supporting backend design team
  • Experience with clock trees, routing, DRC, LVS, metal fill till artwork release.
  • Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering or a related technical field

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