FPGA Design/Verification Engineer

US Citizen Only- no clearance

These positions are for Design work and will be greater than 50% remote however the individuals MUST be local to either the Sunnyvale, CA; King of Prussia, KOP (Valley Forge) or Denver, CO area and willing to come in to the site as needed.
Must possess 9 years of experience, we are NOT looking for junior or mid-level, only senior level candidates.

As an ASIC & FPGA DESIGN ENGINEER you will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions.
DAILY FUNCTIONS:
Work with low SWaP, radiation hardened, space rated devices.
Develop RTL/VHDL code, scripts, and other items required for the development of FPGAs, complete design and development, and provide self-test designer level testbench. Collaborate with the LM engineering team to debug or simulate Circuitware with Xilinx development tools, deliver FPGA RTL source code changes, test data and documentation as needed. Work with systems engineers and design engineers to develop concept of operations, design requirements, and assist verification engineers in the verification of FPGA designs. Attend team meetings and reviews as needed. Complete or contribute to the design documentation in accordance with processes, all data and drawings must remain exclusively on internal networks or computing resources and protected according to guidance or training provided.
REQUIREMENTS:
*Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
*Experience in the design of FPGA and/or ASIC devices.
*HDL programming experience with VHDL, Verilog, and/or SystemVerilog.

*US Citizenship is required for this position.
*Experience in the design of FPGA and/or ASIC devices.
*Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
*Experienced in scripting such as Perl, TCL, Python.
*Experience developing test cases based off given requirements.
*Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
*Knowledge of space-grade/qualified FPGAs and ASICs.