What are the responsibilities and job description for the ASIC Power Engineer V position at Ursus Inc?
JOB TITLE : ASIC Power Engineer VLOCATION : Onsite in Sunnyvale, CADURATION : 6 monthsPAY RANGE : $109-119 / hourTOP 3 SKILLS : Experience with Synopsys (DC, ICC, PTPX / PrimePower, VCS, Verdi) and / or Cadence (Joules)Should know how to use Python, Perl (or similar) scripting and data-post-processing toolsExperience in low-power design, tools, and methodologies including power intent UPF specifications and Silicon Power CharacterizationCOMPANY : Our client is a Fortune 500 multi-national technology company headquartered in Menlo Park, CA.Job Description : We're looking for an ASIC Power Engineer to perform power analysis and optimizations in ASIC for our client's AR / VR products. Areas of interest include Machine Learning. Primary languages are Python, tcl, and SystemVerilog.RESPONSIBILITIES : Perform PPA optimization with Fusion compiler.Perform RTL and netlist level Power analysis.Perform post-processing and scripting on report log files for format conversion, data analysis and information extraction.Setup, run, debug and analyze reports of ASIC flows (Synthesis, PD, Power, Timing).Implement some blocks at RTL and UPF.Ability to document and communicate clearly.MINIMUM QUALIFICATIONS : 10 Years of experience as an ASIC Power engineer, or CAD.PTPX / PrimePower experience.Engineer / Physical Design engineer.Experience with power estimation tools and synthesis, some physical design.Knowledge of power trade-offs in design and back end implementation.Hands-on experience in scripting, data analysis.BS in Electrical Engineering / Computer Science or equivalent experience.PREFERRED QUALIFICATIONS : Synopsys (DC, ICC, VCS, Verdi) and / or Cadence (Joules).Python, Perl (or similar) scripting and data-post-processing tools.Excel (or Matlab) for model fitting, data visualization and analysis.Experience in low power design, tools and methodologies including power intent UPF specifications.Silicon Power Characterization.Some power profiling experience at IP / SoC level.Must have Skills : Experience with Synopsys (DC, ICC, PTPX / PrimePower, VCS, Verdi) and / or Cadence (Joules).Should know how to use Python, Perl (or similar) scripting and data-post-processing tools.Experience in low-power design, tools, and methodologies including power intent UPF specifications and Silicon Power Characterization.Nice-to-have Skills : Some power profiling experience at IP / SoC level.Experience with Silicon Power Characterization.Experience with Data analytics and visualization.IND123#J-18808-Ljbffr
Salary : $109 - $119
