Demo

CPU Power Engineer

VeeAR Projects Inc.
Santa Clara, CA Full Time
POSTED ON 4/2/2025
AVAILABLE BEFORE 6/26/2025
  • 8 to 15 years' experience in CPU power design including design analysis, benchmarking, modeling and simulation.
  • Experience and working knowledge of CPU architectures and workload modeling for power. RISC-V architecture familiarity and experience is a plus.
  • Familiarity with Verilog and SystemVerilog RTL coding
  • Experience in silicon design flow and evaluating PPA trade-offs at architecture, logic and circuit design levels
  • Knowledge of device physics, advanced process technology and circuit design fundamentals is a plus
  • Experience in state-of-the art EDA tools for gate and transistor level power modeling and simulations.
  • Python, TCL and other scripting languages

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