What are the responsibilities and job description for the Analog Layout Engineer position at VirtualVocations?
A company is looking for an Analog Layout Engineer responsible for designing high-performance analog cores.Key ResponsibilitiesLead the IC layout of high-performance analog cores including ADCs, DACs, PLLs, and transceiversUtilize industry best practices for layout in various CMOS process nodes from 5nm to 65nmSet up and debug LVS, DRC, and ERC environments using EDA toolsRequired QualificationsThorough knowledge of EDA tools from Cadence, Mentor, and Synopsys10 years of experience in high-performance analog layout in advanced CMOS processesExperience with layout techniques such as common centroid layout and thermal-aware layoutFamiliarity with FinFET process nodes is preferredExperience in layout automation and skill code is a plus
