What are the responsibilities and job description for the Principal Analog Mixed-Signal Design Engineer - RF/Sipho/TIA/CMOS/Siege position at Vodastra?
Job Title: Principal Analog Mixed-Signal Design Engineer - RF/SiPho/TIA/CMOS/SiGe
Location: Westlake Village, CA (Hybrid – Minimum 2 days/week on-site)
Employment Type: Full-Time, C2C Eligible
Salary Range: $145,300 - $215,010 per year
About the Role:
We are seeking a highly skilled Principal Analog Mixed-Signal Design Engineer with expertise in designing high-speed broadband ICs for optical data communication. This position offers a unique opportunity to work on cutting-edge technologies such as Transimpedance Amplifiers (TIAs) and Silicon Photonics (SiPho) for data center and telecom applications.
As a key member of the design team, you will play a critical role in designing innovative analog and RF circuits that push industry standards for performance and efficiency.
Responsibilities:
- Design and validate advanced broadband analog circuits for high-speed optical front-end receivers.
- Develop and implement FET and BiCMOS circuit designs with a focus on high-performance Silicon Germanium (SiGe) BiCMOS technology.
- Lead microarchitecture development for major circuit blocks and guide junior designers.
- Innovate in the design of linear regulators, AGC loops, current/voltage sensors, bandgaps, and more.
- Collaborate with cross-functional teams for post-silicon validation, product qualification, and mass production.
- Conduct layout and performance testing to ensure correlation between simulation and real-world results.
Required Skills & Qualifications:
- Education: Bachelor’s in Electrical Engineering; advanced degrees (MSc/PhD) preferred.
- Experience:
- 10 years in RF/Analog circuit design, including chip tape-out and lab evaluation.
- Proven expertise in transistor-level design, control loop stability, and device physics.
- Strong command of EDA tools and analog custom layout techniques.
- Hands-on experience in AGC loop design, linear regulator design, and DAC/ADC integration.
- Technical Leadership: Ability to mentor junior designers and lead chip-level projects to successful silicon outcomes.
Preferred Qualifications:
- Proficiency in SiGe BiCMOS technology and CTLE design.
- Experience with system-package integration.
- Background in successfully taking chips to mass production.
- Strong communication, presentation, and documentation skills.
What’s Exciting About This Opportunity?
- Work with a market-leading team in delivering innovative solutions for data center and telecom networks.
- Contribute to groundbreaking designs that support AI connectivity in hyperscaler data centers.
- Competitive compensation package with RSU grants, annual bonus (17%), and relocation assistance.
- Be part of a culture that values purposeful and enduring innovation.
Tags:
#AnalogDesign #MixedSignal #SiGeBiCMOS #RFEngineering #OpticalCommunication #TIA #SemiconductorJobs #ICDesign #EDA #WestlakeVillageJobs #HybridWork
Salary : $145,300 - $215,010
