What are the responsibilities and job description for the Principal Digital Design Engineer - Technical Lead position at CyberCoders?
We are looking for an experienced and passionate Principal Engineer / Technical Lead to join our team. In this role, you will be responsible for hands-on technical work while creating & managing the front-to-back design for our cutting-edge wireless infrastructure SOCs (5g-6g ), from architecture & RTL through logic design.
Key Responsibilities
Base Pay, Pre-IPO equity, Health, Dental, Vision, 401k
Email Your Resume In Word To
Looking forward to receiving your resume through our website and going over the position with you. Clicking apply is the best way to apply, but you may also:
jason.kuna@cybercoders.com
Employer is willing to sponsor qualified candidates for a non-immigrant work visa.
CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance.
This job was first posted by CyberCoders on 04/30/2024 and applications will be accepted on an ongoing basis until the position is filled or closed.
CyberCoders is proud to be an Equal Opportunity Employer
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. If you need special assistance or an accommodation while seeking employment, please contact a member of our Human Resources team to make arrangements.
Key Responsibilities
- Create and manage digital designs for SOCs from architecture and RTL to logic design
- Utilize tools such as Verification, Mixed Signal, Power Management, Synthesis, static timing, SystemVerilog, ATPG, Fault Grading, SCAN, Clock-domain, BIST, DFM, TCL, Python, Wireless, Amba, Protocol Bus Architecture, DFT, ARM/RISC, AXI/AHB/APB, Multi-core CPU, VHDL/Verilog and Fault Coverage Analysis
- Develop and implement strategies to improve the performance of the digital design process
- Work with stakeholders to ensure customer satisfaction and customer requirements
- Analyze and interpret digital network and system data to identify areas of improvement
- Develop and maintain documentation for processes, procedures and design standards
- Stay abreast of the latest digital design trends and techniques
- Identify areas of risk and take corrective action to mitigate them
- MS / PhD in Electrical Engineering, Computer Engineering or related field
- Proven experience in digital design, architecture, RTL, and logic design
- Hands on experience with AMBA AXI/APB/AHB protocol bus architecture specs & implementations
- Some wireless experience - i.e. WiFi, iOT, Bluetooth, 4G, 5G, etc.
- Verilog, VHDL & System Verilog language experience & tools like linting, simulation, formal verification, clock-domain crossing checking, etc.
- ARM/RISC architecture, multi-core CPU system memory & operation hierarchy experience
- UVM/OVM methodology & language (SystemVerilog) experience
- Ability to manage multiple projects with tight deadlines
- Programming & Scripting experience - i.e. C/C , Tcl, Python, Perl, awk, sed, etc.
- Excellent leadership experience & technical capabilities, wear multiple hats
- Nice to have skills & tech include: Verification, Mixed Signal, Power Management, Synthesis, static timing, SystemVerilog, ATPG, Fault Grading, SCAN, Clock-domain, BIST, DFM, TCL, Python,
Base Pay, Pre-IPO equity, Health, Dental, Vision, 401k
Email Your Resume In Word To
Looking forward to receiving your resume through our website and going over the position with you. Clicking apply is the best way to apply, but you may also:
jason.kuna@cybercoders.com
- Please do NOT change the email subject line in any way. You must keep the JobID: linkedin : JK-1799996 -- in the email subject line for your application to be considered.***
Employer is willing to sponsor qualified candidates for a non-immigrant work visa.
CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance.
This job was first posted by CyberCoders on 04/30/2024 and applications will be accepted on an ongoing basis until the position is filled or closed.
CyberCoders is proud to be an Equal Opportunity Employer
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. If you need special assistance or an accommodation while seeking employment, please contact a member of our Human Resources team to make arrangements.
Salary : $175,000 - $230,000
