Sr. Digital Design Engineer

***Candidate must sit onsite in San Jose, CA***

***Candidate must be able to work W2 perm position***

Top Skills

• Must have very strong system Verilog experience and some computer architecture experience
• Wants someone who hasn't worked from spec their whole career as well
• Low-energy experience: clock gating, different ways to minimize circuit energy - come prepared to talk about that in interview
• Writing UPF constraints would be a great additional skill

Key Responsibilities

• Design, implement, and verify features from specification through synthesis
• Implement product features at the RTL-level targeting silicon implementation
• Implement product features at the RTL-level targeting FPGA emulation for verification
• Build unit testbench infrastructure to verify implemented features
• Design of memory systems and digital integration of memory macros, including SRAM, MRAM, and others
• Interface design components with external/vendor-provided IP
• Use industrial-strength digital design tools from RTL simulation through synthesis, which may include Cadence, Synopsys, Mentor/Siemens EDA, and ANSYS as necessary
• Provide comprehensive feature and integration documentation
• Interact with physical design and digital verification team for pre-silicon verification
• Work with physical design team to resolve RTL-level issues leading to DRC violations
• Work with compiler and embedded software teams to develop, document, and implement features that span across the software-hardware boundary, including client’s dataflow ISA

Required qualifications & experience

• 7 years of digital design experience with substantial experience designing for tape-out
• Experience running a digital design flow using industry-strength digital design and EDA tools
• Experience with designing and implementing features in RTL
• Experience integrating digital IP with RTL-level implementations
• Experience with pre-silicon verification
• Experience with continuous integration and testing of digital designs
• Experience with version control and scripting languages (Python preferred)
• Experience with memory compiler toolchains
• Strong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skills
• Good problem solving skills

Desired qualifications & experience

• Experience designing compilers
• Knowledge of computer architecture
• Knowledge of physical design and ASIC implementation
• Experience with power and energy modeling (using tools like PowerArtist, Joules, etc.)
• Bachelor’s degree in related field required. Master’s or PhD. preferred.