Demo

Design Verification Engineer

Eximietas Design
Santa Clara, CA Full Time
POSTED ON 4/3/2025
AVAILABLE BEFORE 5/2/2025

Location: Santa Clara, CA- Onsite

Experience: 5 Years

Type: Full-time


About the Role

At Eximietas Design, we’re pushing boundaries in semiconductor innovation—and we're building a top-tier team of Design Verification Engineers focused on networking silicon. This is your opportunity to work on cutting-edge SmartNICs, DPUs, and high-speed switch ASICs, validating some of the most performance-critical components in modern cloud and data centre infrastructure.


What You’ll Work On

  • Develop UVM/SystemVerilog testbenches for advanced networking SoCs.
  • Verify critical networking blocks such as:
  • Ethernet MAC/PHY (1G/10G/100G/400G)
  • L2/L3 forwarding pipelines, packet classifiers, schedulers
  • VLAN, QoS, multicast, and traffic-shaping logic
  • Drive coverage closure, assertion-based verification (SVA), and scoreboarding.
  • Collaborate with design, architecture, and software teams to ensure robust functionality.
  • Contribute to full-system validation using simulation, emulation, or FPGA platforms.


What We’re Looking For

  • 5 years of experience in ASIC/SoC Design Verification.
  • Deep understanding of networking protocols: Ethernet, TCP/IP, VLAN, routing, switching.
  • Strong expertise in SystemVerilog/UVM, functional coverage, and debugging.
  • Experience with packet processing logic, buffers, schedulers, and routing engines.
  • Proficiency in scripting (Python, Perl, Shell) for automation and regression flows.


Bonus Points For

  • Prior work on SmartNICs, DPUs, or network switch/router silicon.
  • Hands-on with emulation (Veloce, Palladium, Zebu) or FPGA-based prototyping.
  • Familiarity with L2/L3 ECMP, multicast, and programmable pipelines.
  • Background at companies like Broadcom, Marvell, NVIDIA, Cisco, Intel, or similar.


Why Join Eximietas Design?

  • Build next-generation networking chips from the ground up.
  • Work with an elite team of DV and architecture experts.
  • Tackle real packet-level verification challenges that impact global infrastructure.
  • Competitive compensation, benefits, and a strong engineering culture.


Ready to Apply?

📩 Reach out directly at mohini.tyagi@eximietas.design

🌐 Visit us at www.eximietas.design

Let’s build the future of networking silicon – together.


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