What are the responsibilities and job description for the Design Verification Engineer position at Fidelis Companies?
Principal ASIC / SoC Verification Engineer
Role Overview
As a Principal ASIC / SoC Verification Engineer you'll play a pivotal role in verifying IP for ASIC products, including custom AI chips. This position demands expertise in IP and subsystem verification, particularly in SerDes and processor subsystems, among other IP components.
Key Responsibilities :
- Architect modern verification environments and test benches.
- Utilize industry-standard verification methodologies and tools, with a deep understanding of UVM, System Verilog, RTL design, and verification.
- Define block and sub-system level test plans, create reusable test benches, and drive verification closure.
- Perform CDC checks, formal verification, functional coverage, gate-level debug, and emulation.
- Provide strong debugging and problem-solving skills to resolve complex issues under schedule pressure.
- Bring expertise in SerDes systems, including architecture, protocols, and SerDes bring-up.
- Apply knowledge of processor microarchitectures and bus protocols.
- Contribute to the creation and management of automated verification environments.
- Communicate effectively and collaborate as a team player.
Requirements :
Note : This position offers the opportunity to work on cutting-edge AI chip projects within a dynamic and innovative environment.
