What are the responsibilities and job description for the ASIC Design Verification Engineer position at Get Your Project Ready Private Limited?
Job Details
Position-8: ASIC Design Verification Engineer
Location: San Francisco Bay Area, CA (On-Site)
Job Type: 12 Months Contract
About the Role:
We are seeking a highly skilled and motivated ASIC Design Verification Engineer with over 6 years of experience in the field of verification. As an Individual Contributor, he/she will play a crucial role in ensuring the quality and reliability of our cutting-edge ASIC designs, contributing to industry-leading innovations.
Required Skills:
- 6 Years of experience required.
- Develop and implement test plans, test cases, and coverage metrics for ASIC verification.
- Perform block-level and chip-level verification
- Proficiency in System Verilog and UVM (Universal Verification Methodology).
- Exposure to CPU-based verification techniques is highly desirable.
- Familiarity with Direct Programming Interfaces (DPI) is a plus.
- Strong problem-solving and debugging skills, with keen attention to detail.
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