What are the responsibilities and job description for the E-core CPU Backend Engineer for Full-Chip Timing position at Intel Corporation?
Job Description
Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Want to learn more? Visit our YouTube Channel or the links below!
Become a key member of a team participating in the Integration and Verification of a future Intel CPU. This position requires and Engineer with broad Physical Design and Static Timing Analysis skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team.
Who You Are
Your responsibilities may include, but are not limited to:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Preferred Qualifications
The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.
Other Locations
US, Hillsboro
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Annual Salary Range for jobs which could be performed in the US $139,710.00-$197,230.00
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Want to learn more? Visit our YouTube Channel or the links below!
- Life at Intel
- Intel Global Diversity and Inclusion
Become a key member of a team participating in the Integration and Verification of a future Intel CPU. This position requires and Engineer with broad Physical Design and Static Timing Analysis skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team.
Who You Are
Your responsibilities may include, but are not limited to:
- As a FC Design Engineer, you will perform constraints management and STA verification.
- You will also be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR.
- You will drive timing closure and provide collateral for SOC drops.
- Excellent written and oral presentation skills, and willing to work across multiple organizations and geographies.
- Effective team player with continuous learning mindset.
- Strong analytical and problem-solving skills.
- Be willing to balance multiple tasks.
- Self-starter with a collaborative spirit, comfortable asking for help when needed
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering with 3 years' of relevant experience
- OR Master's degree in Electrical Engineering, Computer Engineering field with 2 years' of relevant experience
- Your experience in following area:
- Experience with Scripting in one or more of the following languages (TCL, Perl, or Python)
- Experience with Static Timing Analysis using PrimeTime
Preferred Qualifications
- Experience with verification of power crossing ie. VC-static (VC LP), UPF
- Experience providing ECOs for both min/max timing fixes and for noise
The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.
Other Locations
US, Hillsboro
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Annual Salary Range for jobs which could be performed in the US $139,710.00-$197,230.00
- Salary range dependent on a number of factors including location and experience
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Salary : $139,710 - $197,230
Principal Engineer, Physical Design Timing
Intel Corporation -
Hillsboro, OR
CPU Physical Design Engineer
Apple -
Beaverton, OR
CPU Physical Design Engineer
Lensa -
Beaverton, OR
