What are the responsibilities and job description for the Senior FPGA Design Verification Engineer position at IT Engagements?

Greetings from IT Engagements !

IT Engagements is a global staff augmentation firm providing a wide-range of talent on-demand and total workforce solutions. We have an immediate opening for the below position with one of our premium clients.

Title : Senior FPGA Design Verification Engineer

Location : Dedham, Massachusetts

Industry : Aerospace / Aviation / Defense

Job Category : Engineering Electrical

Job Type : Full Time

Workplace Options : This position is fully on-site, you will be part of the Dedham, MA team. Relocation is available.

Basic Qualifications :

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering, or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience.
Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Role and Position Objectives :

Sign-on Bonus up to $3000 for New Hires.

As a Senior Cyber FPGA Design Verification engineer, you'll be a member of a cross-functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.

Preferred Skills and Experience :

Experience with OVM / UVM design verification methodology; bash / csh, Perl, TCL, Python, or similar scripting languages; VHDL or similar hardware description languages.

Experience defining verification methodology for complex FPGAs.

Ability to analyze requirements, create test plans, build, and set up scalable simulation environments from the ground up using SystemVerilog / UVM.

Familiarity with testing complex designs, code coverage, functional coverage, assertions.

FPGA / ASIC design experience is a plus.

Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus.

Team player who thrives in collaborative environments and revels in team success.

Our Commitment to You :

An exciting career path with opportunities for continuous learning and development.

Research-oriented work, alongside award-winning teams developing practical solutions for national security.

Flexible schedules with every other Friday off work, if desired (9 / 80 schedule).

Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more.

Company Overview : Our client is dedicated to ensuring the safety of those who lead, serve, and protect the world we live in by developing advanced defense platforms. Their engineers push the boundaries of technology, and their manufacturing team brings it to life, building the brains behind submarines, ships, combat vehicles, aircraft, satellites, and other advanced systems.

They are committed to a diverse and exciting employee experience that fosters innovation and a collaborative community.

Security Clearance Required : Yes

Visa Candidate Considered : No

Compensation :

Full-time opportunity

Benefits : Full

Relocation Assistance Available : Yes

Interview Travel Reimbursed : Yes

Candidate Details :

7 to 10 years of experience

Seniority Level : Mid-Senior

Management Experience Required : No

Minimum Education : Bachelor's Degree

Willingness to Travel : Occasionally

Regards,

Shashank Jaitly

Shashank@itengagements.com

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Senior FPGA Design Verification Engineer

What are the responsibilities and job description for the Senior FPGA Design Verification Engineer position at IT Engagements?

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