What are the responsibilities and job description for the Senior FPGA Design Verification Engineer position at MARVEL Infotech Inc.?
Senior FPGA Design Verification Engineer onsite at Dedham, Massachusetts ( Aerospace Domain)
Security Clearance Required: YES
As a Senior Cyber FPGA Design Verification engineer, you’ll be a member of a cross-functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.
We encourage you to apply if you have any of these preferred skills or experiences: Experience with OVM / UVMdesign verification methodology: bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages.
What sets you apart:
Experience defining verification methodology for complex FPGAs.
Ability to analyze requirements, create test plan, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM
Familiarity with testing complex designs, code coverage, functional coverage, and assertions.
Ability to work in a dynamic environment that includes working with changing needs and requirements.
FPGA/ASIC design experience is a plus.
Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools is a plus.
Team player who thrives in collaborative environments and revels in team success
