What are the responsibilities and job description for the Senior RTL Design Engineer position at Pace Engineering Recruiters?
About the Role
We are seeking a talented and motivated ASIC RTL Design Engineer to join our cutting-edge development team. As an RTL Design Engineer, you will play a critical role in designing and implementing the digital logic for high-performance ASIC products. You will work closely with cross-functional teams, including architecture, verification, and physical design, to deliver robust, efficient, and high-quality designs.
Key Responsibilities
- RTL Design : Create high-quality Register Transfer Level (RTL) code using Verilog or SystemVerilog based on architectural specifications.
- Micro-architecture Development : Define and document micro-architecture specifications and ensure they align with system requirements.
- Integration : Integrate design components into larger subsystems and verify their functionality.
- Optimization : Optimize designs for performance, power, and area (PPA) while meeting timing constraints.
- Collaboration : Work closely with verification teams to ensure designs meet functional requirements and participate in debug efforts.
- Synthesis and Timing Analysis : Collaborate with physical design teams to support synthesis, static timing analysis, and design closure.
- Documentation : Maintain detailed documentation of design specifications, architecture, and methodologies.
Qualifications
Required Skills and Experience :
