What are the responsibilities and job description for the Analog Layout Engineer position at PER International?
We’re partnering with a fast-growing semiconductor startup revolutionizing edge AI computing. With strong funding and industry-leading expertise, they offer engineers the opportunity to shape next-generation SoC designs in a highly innovative and collaborative environment.
The Analog Layout Engineer will lead a team in delivering high-quality analog and mixed-signal layouts. This role involves collaborating with project managers and design engineers, driving critical layout decisions, and ensuring all designs meet performance and manufacturing requirements.
Key Responsibilities:
- Lead a team in delivering high-quality analog and mixed-signal layouts.
- Collaborate with project managers and design engineers to define requirements.
- Drive critical floor-planning and layout methodology decisions.
- Ensure designs meet project specs and industry standards.
- Review and approve final layouts for production.
- Stay current with industry trends and design tools.
Qualifications:
- B.S. in Electrical Engineering or equivalent, 8 years of experience.
- Expertise in deep submicron CMOS and advanced node layout design.
- Proficiency in Cadence Virtuoso, Calibre DRC, LVS.
- Strong layout principles, problem-solving, and leadership skills.
- Ability to manage multiple projects and work independently or in a team.
Preferred:
- Experience with memory blocks (sense amps, charge pumps, PVT trackers).
- Familiarity with memory controllers and emerging NVM technologies.
Interested?
To apply for this opening or to find out more about our other opportunities, please contact Georgie Rose on LinkedIn or send an email to Georgie@per-international.com
