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Circuit Design Engineer

PER International
San Jose, CA Full Time
POSTED ON 2/20/2025
AVAILABLE BEFORE 3/20/2025

Join a fast-growing startup redefining edge AI computing with cutting-edge semiconductor technology. Backed by strong funding and industry leaders, this team offers an exciting opportunity to shape next-gen SoC designs in a highly innovative and collaborative environment.


The Memory Circuit Design Engineer will drive memory IC development from concept to tape-out, optimizing speed, power, and silicon efficiency while collaborating across teams to enhance performance.


🔹 Key Responsibilities:

  • Lead memory IC design from concept to tape-out, optimizing speed, power, and silicon area.
  • Develop and validate memory architectures (SRAM, DRAM, Flash, or NVM) using industry-standard tools.
  • Troubleshoot design issues, collaborate cross-functionally, and support silicon bring-up.
  • Stay updated on cutting-edge memory technologies and ensure high-quality, reliable designs.


🔹 Qualifications:

  • MS/PhD in Electrical Engineering (focus on CMOS, digital, or mixed-signal design).
  • 5 years of experience in circuit design & successful tape-outs in advanced CMOS processes.
  • Strong background in layout design, EDA tools (Synopsys, Cadence, Mentor Graphics), and memory circuit innovation.
  • Startup mindset—independent yet team-oriented.


🔹 Preferred:

  • Expertise in key memory blocks (sense amps, charge pumps, PVT trackers).
  • Familiarity with memory controllers & emerging NVM technologies.


🔹 Interested?

To apply for this opening or to find out more about our other opportunities, please contact Georgie Rose on LinkedIn or send an email to Georgie@per-international.com

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