What are the responsibilities and job description for the CPU Design/Verification - Intern position at Rivos?
Positions are open for Co-op / internship in the areas of CPU RTL design and verification from unit level to chip level.
We are looking for candidates who have taken modern CPU microarchitecture related courses.
Responsibilities
Design Intern : Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specificationDevelopment, assessment, and refinement of RTL design to target power, performance, area, and timing goalsValidation - support test bench development and simulation for functional and performance verificationPerformance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performanceDesign delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and powerVerification Intern : Work closely with architecture and RTL designers on verifying the functionality correctness of the designReviewing Architecture and Design SpecificationsDevelop test plans and test environmentsDevelop tests in assembly, C / C , or vectors according to test plansDevelop coverage monitors and analyze coverage to ensure all the test cases in the plans are coveredDevelop checkers in SystemVerilog or C-base transactors to verify the designWrite assertions and apply formal verification to the designImplementing test benches, generating directed / constrained random testsDebugging failures, running simulations, tracking bugsHandling schedules and supporting multi-functional engineering effortAssisting in verification flows, automation scripts and regressionsRequirements
Thorough knowledge of modern CPU microarchitecture in the following areas : Instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load / store execution, cache and memory subsystems.Knowledge of SystemVerilogExperience with simulators and waveform debugging toolsKnowledge of logic design principles along with timing and power implicationsUnderstanding of low power microarchitecture techniquesUnderstanding of high performance techniques and trade-offs in a CPU microarchitectureExperience in C or C programmingExperience using an interpretive language such as Perl or PythonExcellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.Ability to work well in a team and be productive under aggressive schedules.Education and Experience
PhD, Master's Degree or Bachelor's Degree in technical subject area.
