What are the responsibilities and job description for the Digital Design Engineer position at SGS Consulting?
Job Details
Job Title: Digital Design Engineer
Duration: 3 Years
Location: Lexington, MA
Job Description:
Plans, performs, and executes engineering research and design development for both new products and existing products. Performs design/HDL analysis, including high speed and low power designs. Participates in simulation, verification, and integration tasks. Takes algorithmic or functional specifications and coverts that to a design that can be implemented for use in a lab or field environment. Develops models, simulate and verify designs, fabricate prototypes, and test hardware solutions. Creates and maintains accurate and detailed design files. Candidate should possess experience in electrical engineering and a track record of demonstrating designs on hardware. Digital HDL design experience is required, including complex, highspeed HDL based implementations of algorithms targeting programmable logic devices (PLDs, FPGA, ASIC,etc), microprocessors, DSP and/or ARM processors. Handson experience with code design, simulation and testing is required.
Background/Need:
The Group develops advanced laser communications technology for many applications. Research in optical switching and optical logic supports the development of future ultrahighspeed, alloptical routing. Research in superconducting, single photon counting detectors, novel modulation formats, and coding supports the development of future highdatarate, interplanetary laser communications links. These technologies support the most sensitive optical communications links ever developed, enabling communication of several bits per detected photon across vast distances.
Other information relevant to the job requirement?
Required Skills:
Procient in Verilog, System Verilog, VHDL and C.
Ability to take an FPGA from concept to a device that meets all functional and timing requirements. This would also include generating system level test benches to verify FPGA performance, functionality and error recovery using Mentor Questa Logic Simulator.
Experience with the Zynq Ultrascale RFSoC platform.
Experience coding across multiple clock domains.
Experience coding triplemode redundancy for radiation resistance.
Familiarity with the digital processing architecture for lasercom waveform standards
Candidate must have demonstrated knowledge of and delivered products involving:
1) the Xilinx Virtex 5 SIRF FPGA;
2) Xilinx ISE 13.2 with SIRF Overlay;
3) Synopsys Synplicity targeting the Virtex 5 SIRF;
4) Code design for radiationhardened operation of the Xilinx Virtex 5 SIRF;
5) Radiationhardened CPUs;
6) Analog to digital converters (ADCs) and digital to analog converters (DACs);
7) SPI, I2C, SpaceWire, and Ethernet protocols;
8) Forward error correction, including ReedSolomon and DVBS2;
9) CoaXPress and CameraLink camera interfaces;
10) Differential phaseshift keying (DPSK) and pulse position modulation (PPM) optical modulation techniques; and
11) Control loops for synchronization of quantumentangled sources.
Preferred Skills:
Ability to communicate eectively with other team members. Ability to design and program a Xilinx MicroBlaze embedded processor. Familiar with Xilinx Vivado and Vivado SDK. Experience with PCIe, CoaXpress, DVBS2 Error Correction, SCPPM FEC, and PPM modulation and demodulation is also desired.
This position is working on hardware and is predominantly onsite. There will be some exibility, but the person should plan to be onsite close to 100% of the time.
Interim clearance is sucient for start.