Package R&D Engineer

Company Description

Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.

Job Description

Solidigm is seeking an innovative Package R&D Engineer to support pathfinding and development of package technologies for Solid State Drive (SSD) and NAND flash storage card applications. In this position, you will be responsible for innovation in packaging technologies to meet SSD product roadmap. In addition, you will be responsible for the development of package design including package stack up and configuration, substrate design, design collaterals, package pin assignments, signal integrity simulation and assessment, package data sheets, and interface with internal/external standards forums. Other responsibilities include driving/tracking package design milestones, integrating product requirements into packaging solutions, identifying and resolving packaging design issues, and communication of design status.

• Substrate breakout/layout studies enabling new package designs
• Drive Pathfinding projects execution from exploration to NPI
• Work closely with other teams, e.g., Q&R, HW Engineering, Test, and others
• Drive innovation and continuously look for breakthrough ideas to reduce risks

Qualifications

• BS Mechanical, Electrical or other Engineering discipline
• 2-4 years of experience in semiconductor package development including wirebond and Flip Chip
• Experience in using AutoCAD and Cadence suite (APD, Editor, SIP)

Preferred Skills:

• Solid understanding of package substrate design practices from a signal integrity perspective.
• Knowledge of electrical analysis and design of high-speed buses (differential and single ended) as well as familiarity with simulation, modeling, and analysis tools.
• Demonstrated skills in program management, communication, teamwork, planning, and prioritization.

Additional Information

For California, Colorado, New York, Washington, and remote roles: The compensation range for this role is $118,860 - $196,720. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.