What are the responsibilities and job description for the Design Verification & CAD Engineer position at Talent Junction?
Job Description
Job Description
Title : Design Verification & CAD Engineer
Location : San Jose, C
Education : Bachelors or Master;s Degree
Required Experience / Skills
Experience level 7 years
Experience with SV UVM / OVM / VMM or Specman / eRM / UVMe
Independently contribute to verification environment development.
Tools knowledge : DC / PT, spyglass, conformal, power artist, fishtail, questa CDC / RDC
Prior experience with assertions, functional coverage & code coverage is desired.
Experience with SOC with C / ASM based tests, Graphics or CPU is an added advantage
Proficient on protocols AXI, AHB, USB, PCIe, DDR, LPDDR, HDMI, MIPI, ethernet.