What are the responsibilities and job description for the Senior DSP R&D Engineer position at Tara Technical Solutions (TTS)?
New Senior DSP R&D Engineer.
Full-Time.
Irvine - California.
Fortune 500 Public Client.
Responsibilities include:
• Develop specification, architecture, and micro-architecture of digital signal processing and communications algorithms.
• Bit-exact MATLAB/Simulink and C/C system modeling and simulation
• Develop and run system level simulation suites of the copper Ethernet PHY transceivers and perform vector matching verification with RTL simulations.
• Define and document chip requirements, architecture, verification and lab test plan.
• Lab testing and debug of ASICs
• Documentation/application note development and customer support
Requirements:
• Master's and 3 years of related experience; or PhD in Digital Signal Processing
• Knowledge in Communication Theory & Digital Signal Processing algorithms
• Experience in equalizers, Timing Recovery, Echo Cancellation and Gain Control algorithms
• Experience in C/C , MATLAB/Simulink,
• Experience architecting communications systems for high performance ASIC based products is highly desirable
• Good hands-on skills in the lab
• Good oral and written communication skills
• Experience in Wireline Algorithms
• Experience in Ethernet 802.3 PHY Transceivers
