What are the responsibilities and job description for the Field-Programmable Gate Arrays Engineer position at Teksky LLC?
Job Opportunity: Senior FPGA Validation Engineer
Location: San Jose, CA (Onsite)
Job Type: Full time
Job Description
The FPGA Engineer position offers the chance to join one of the industry’s leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure, and disaggregated compute ecosystems. In this role, you will bring your knowledge of FPGAs and computer architecture to work on design verification, debugging, and system integration. You will collaborate closely with the Architecture, Verification, ASIC Design, and Software teams while reporting to the Engineering organization.
Key Responsibilities
- Set up FPGA/Emulation platforms (e.g., Synopsys HAPS) and device modeling
- Configure FPGA/Emulation debugging tools
- Customize SOC designs for FPGA platforms
- Perform modeling, debugging, verification, and software support
- Collaborate with SOC design engineers, verification team, systems team, and software engineering for early prototyping, issue debugging, and fix identification
- Support test program development, chip validation, and chip lifecycle until production maturity
Qualifications
- Strong experience working with FPGAs, including familiarity with PCIe, USB, Ethernet, SPI, CPU, and other SOC ASIC design blocks
- Proficiency with FPGA tools like Vivado
- Familiarity with Synopsys HAPS FPGA systems is preferred
- Excellent communication skills
- Bachelor’s or Master’s degree (preferred) in EE/EECS/CS or equivalent
- 5 years of relevant working experience
How to Apply
If you’re passionate about innovation and meet the qualifications, we encourage you to apply. Please send your updated resume to doran@teksky.com.
