What are the responsibilities and job description for the Senior Failure Analysis Engineer position at VMC Soft Technologies, Inc?
Title : ASIC Failure Analysis Engineer
Location : Bay Area CA(Onsite)
Contract : Full Time
San Jose CA
Only USC ,GC & GCEAD
Job Description
- Must Have Technical / Functional Skills
- Bachelor's in Electrical / Electronics Engineering or related required. Master's Preferred
- 5 years of experience in failure analysis field (preferably semiconductor).
- Semiconductor technology and process knowledge (Fab, Assembly, and Advanced Packaging).
- Experience of FA techniques like Cross sectioning, X-ray, CSAM, TDR, FIB, SEM, and TEM is required.
- Fundamental knowledge of fault isolation technique , ATE, Scan / ATPG debug preferred.
- Good understanding of transistor functions and basic electronics.
- Knowledge of JEDEC IC Qualification tests and requirements is beneficial.
- Innovative and Creative with troubleshooting techniques.
- Enjoy hands-on work and working in a lab environment.
- Good customer and vendor management skills.
- Ability to work well in cross-functional teams in a fast-paced, collaborative team environment.
- Ability to work independently, multi-task, and pay good attention to details.
- Experience Required
- 5 years of experience in failure analysis field (preferably semiconductor), Semiconductor technology and process knowledge (Fab, Assembly, and Advanced Packaging).
Note : Interested candidates share your resumes to sai1@vmcsofttech.com or reach me out 4804076917
