Title: DFT Engineer

Location: Phoenix, AZ( Hybrid)

Duration: 6 Months

Job Description:

Develop and implement DFT architecture and infrastructure

Develop and drive execution of enhanced DFX (DFT/Design-For-Debug) methodologies, with increased focus on debug support

Work with the DV team to verify DFT implementations

Generate structural test vectors, analyze and improve coverage/test time/test cost

Work with designers on STA, physical, power and logical issues impacting DFT

Work with test engineers to bring up test vectors on silicon

Work with lab bring-up teams to bring up test vectors in the lab environment

Manage schedules and support internal and external cross-functional/cross-organizational engineering efforts

Required Skills:

A minimum of three years of experience with Hardware Design-For-Test (DFT) engineering including

A minimum of three 3 years of experience in uP and/or GPU and/or Video Processing

Bachelor’s Degree or equivalent (12 years) work experience (If an, Associate’s Degree with 6 years of work experience)

Nice to Have:

Developing DFT specifications

Industry standard DFT and design tools

Debugging ATPG/MBIST patterns

STA constraints and their interaction with DFT

Experience with Root Cause Analysis

IP / Top Scan insertion (all EDA solutions)

IP / Top Mbist insertion (all EDA solutions)

Scripting languages TCL/Perl/Python

Experience with Synopsys DFT tools (Tetramax, DFT compiler, BSD compiler, Formality, Spyglass)

Experience with JTAG and IEEE standards 1149.1 and 1149.6.