Staff Semiconductor Design Engineer Fabric (NOC and Mesh Network) Aptiv’s custom silicon management group provides critical custom Silicon for all Aptiv products including Autonomous Driving, ADAS, Infotainment, Zonal Control, and others. This team translates the system requirements of Aptiv’s next-generation products into the SOC/IC requirements and architectural design, then manages the technical performance of external SOC/IC design partners who design the custom silicon SOCs/ICs for use in Aptiv’s products. We are looking for a Staff semiconductor design engineer to work closely with multiple engineering teams who are focused on the development of Aptiv’s future generation of products. Your Role: Own SOC Fabric (NoC and Mesh network ), micro architecture including integration into SOC Analyze complex NoC data flows at the subsystem and full chip level. Perform high-level performance modeling/simulation and analysis of Fabric and benchmarks, and complex uses cases. Define various performance enhancement techniques which will generate optimal performance. Person should be aware of all corner case scenarios in which Fabric can go into dead lock and Based on what technique we can avoid them in complex SOC frame work. Work with the 3rd party IP vendors to make sure SOC power and performance targets per use cases are fully covered with their IP offering. Interact with the design partner teams to define IP integration, SoC flows to make sure SoC level targets are met. Work with design partner and IP teams to review Lint, CDC, SDC, Verification strategy at SoC level. Work with IP vendor and design partners to make sure coherency through the fabric, end to end latency, data flow, performance requirements are met. Track changes, progress on additional features required from IP vendor specific for Aptiv SOC. Coach and mentor others in your areas of expertise Your Background: Master’s degree in electrical engineering, computer engineering or equivalent. 8 years of experience with ARM CPU based ASIC/SOC. Experience and knowledge of 3rd party IP eco system. Experience with NOC and Mesh network like CMN. Good understanding of ARM based Coherency protocols. Experience in supporting SOC debug and emulator/FPGA based validation. Strong experience with Verilog, System Verilog, UVM based methodologies. Strong Experience in Tcl, Perl, Python scripting. Strong written and verbal communication skills. It’s a plus if you have automotive design experience. Why join us? You can grow at Aptiv. Whether you are working towards a promotion, stepping into leadership, considering a lateral career move, or simply expanding your network – you can do it here. Aptiv provides an inclusive work environment where all individuals can grow and develop, regardless of gender, ethnicity or beliefs. You can have an impact. Safety is a core Aptiv value; we want a safer world for us and our children, one with: Zero fatalities, Zero injuries, Zero accidents. You have support. Our team is our most valuable asset. We ensure you have the resources and support you need to take care of your family and your physical and mental health with a competitive health insurance package. #LI-JK1 Privacy Notice - Active Candidates: https://www.aptiv.com/privacy-notice-active-candidates Aptiv is an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex, gender identity, sexual orientation, disability status, protected veteran status or any other characteristic protected by law. Aptiv is a global technology company that develops safer, greener and more connected solutions enabling the future of mobility. Headquartered in Dublin, Aptiv has approximately 180,000 employees and operates 12 technical centers, as well as manufacturing sites and customer support centers in 44 countries. Visit aptiv.com. Please review Aptiv's privacy policy by following this link: https://www.aptiv.com/privacy-notice